Jump, Loop, and Call Instructions - Unit 3 - Review Questions & Answers from 8051 Microcontrollers & Embedded Systems by Mazidi

 SECTION 3.1: LOOP AND JUMP INSTRUCTIONS

1. The mnemonic DJNZ stands for _

2. True or false. "DJNZ R5,BACK" combines a decrement and a jump in a single instruction. 

3. "JNC HERE" is a -byte instruction.

4. In "JZ NEXT", which register's content is checked to see if it is zero? 

5. LJMP is a -byte instruction. 

Answers: 

1. Decrement and jump if not zero 

2. True 

3. 2 

4. A

5. 3 

SECTION 3.2: CALL INSTRUCTIONS

1. What do the mnemonics "LCALL" and" A CALL" stand for?

2. True or false. In the 8051, control can be transferred anywhere within the 64K bytes of code space if using the 

LCALL instruction.

3. How does the CPU know where to return to after executing the RET instruction?

4. Describe briefly the function of the RET instruction.

5. The LCALL instruction is a -byte instruction. 

Answers: 

1. Long CALL and Absolute CALL 

2. True

3. The address of where to return is in the stack. 

4. Upon executing the RET instruction, the CPU pops off the top two bytes of the stack into the program counter (PC)

register and starts to execute from this new location. 

5. 3 

SECTION 3.3: TIME DELAY FOR VARIOUS 8051 CHIPS

1. True or false. In the 8051, the machine cycle lasts 12 clock cycles of the crystal frequency.

2. The minimum number of machine 

cycles needed to execute an 8051 instruction is _ 

3. For Question 2, what is the maximum number of cycles needed, and for which instructions?

4. Find the machine cycle for a crystal frequency of 12 MHz. 

5. Assuming a crystal frequency of 12 MHz, find the time delay associated with the loop section of the following

DELAY subroutine. 

DELAY: MOV R3,#100

HERE: NOP 

NOP

NOP 

DJNZ R3 , HERE

RET 

6. True or false. In the DS89C420/30, the machine cycle lasts 12 clock cycles of the crystal frequency.

7. Find the machine cycle for a DS89C420/30 if the crystal frequency is 11.0592 MHz. 

Answers: 

1. True 

2. 1

3. MUL and DIV each take 4 machine cycles. 

4. 12 MHz I 12 = 1 MHz, and MC= 1/1 MHz= 1 µs.

5. [100(1 + 1 + 1 + 2)] x 1 µs = 500 µs = 0.5 milliseconds.

6. False. It takes 1 clock. 

7. 11.0592 MHz/1 = 11.0592 MHz; machine cycle is 1/11.0592 MHz= 0.0904 µs = 90.4 ns